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@@ -138,6 +138,13 @@ static inline void zynq_gpio_get_bank_pin(unsigned int pin_num,
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}
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}
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}
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}
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+static const unsigned int zynq_gpio_bank_offset[] = {
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+ ZYNQ_GPIO_BANK0_PIN_MIN,
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+ ZYNQ_GPIO_BANK1_PIN_MIN,
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+ ZYNQ_GPIO_BANK2_PIN_MIN,
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+ ZYNQ_GPIO_BANK3_PIN_MIN,
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+};
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+
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/**
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/**
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* zynq_gpio_get_value - Get the state of the specified pin of GPIO device
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* zynq_gpio_get_value - Get the state of the specified pin of GPIO device
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* @chip: gpio_chip instance to be worked on
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* @chip: gpio_chip instance to be worked on
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@@ -461,6 +468,7 @@ static void zynq_gpio_handle_bank_irq(struct zynq_gpio *gpio,
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unsigned int bank_num,
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unsigned int bank_num,
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unsigned long pending)
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unsigned long pending)
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{
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{
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+ unsigned int bank_offset = zynq_gpio_bank_offset[bank_num];
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struct irq_domain *irqdomain = gpio->chip.irqdomain;
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struct irq_domain *irqdomain = gpio->chip.irqdomain;
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int offset;
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int offset;
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@@ -470,7 +478,7 @@ static void zynq_gpio_handle_bank_irq(struct zynq_gpio *gpio,
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for_each_set_bit(offset, &pending, 32) {
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for_each_set_bit(offset, &pending, 32) {
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unsigned int gpio_irq;
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unsigned int gpio_irq;
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- gpio_irq = irq_find_mapping(irqdomain, offset);
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+ gpio_irq = irq_find_mapping(irqdomain, offset + bank_offset);
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generic_handle_irq(gpio_irq);
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generic_handle_irq(gpio_irq);
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}
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}
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}
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}
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