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@@ -26,27 +26,23 @@ static void __hyp_text save_maint_int_state(struct kvm_vcpu *vcpu,
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void __iomem *base)
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void __iomem *base)
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{
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{
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struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
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struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
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- int nr_lr = (kern_hyp_va(&kvm_vgic_global_state))->nr_lr;
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+ u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs;
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u32 eisr0, eisr1;
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u32 eisr0, eisr1;
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int i;
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int i;
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bool expect_mi;
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bool expect_mi;
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expect_mi = !!(cpu_if->vgic_hcr & GICH_HCR_UIE);
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expect_mi = !!(cpu_if->vgic_hcr & GICH_HCR_UIE);
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- for (i = 0; i < nr_lr; i++) {
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- if (!(vcpu->arch.vgic_cpu.live_lrs & (1UL << i)))
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- continue;
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-
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+ for (i = 0; i < used_lrs && !expect_mi; i++)
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expect_mi |= (!(cpu_if->vgic_lr[i] & GICH_LR_HW) &&
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expect_mi |= (!(cpu_if->vgic_lr[i] & GICH_LR_HW) &&
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(cpu_if->vgic_lr[i] & GICH_LR_EOI));
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(cpu_if->vgic_lr[i] & GICH_LR_EOI));
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- }
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if (expect_mi) {
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if (expect_mi) {
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cpu_if->vgic_misr = readl_relaxed(base + GICH_MISR);
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cpu_if->vgic_misr = readl_relaxed(base + GICH_MISR);
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if (cpu_if->vgic_misr & GICH_MISR_EOI) {
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if (cpu_if->vgic_misr & GICH_MISR_EOI) {
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eisr0 = readl_relaxed(base + GICH_EISR0);
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eisr0 = readl_relaxed(base + GICH_EISR0);
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- if (unlikely(nr_lr > 32))
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+ if (unlikely(used_lrs > 32))
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eisr1 = readl_relaxed(base + GICH_EISR1);
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eisr1 = readl_relaxed(base + GICH_EISR1);
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else
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else
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eisr1 = 0;
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eisr1 = 0;
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@@ -87,13 +83,10 @@ static void __hyp_text save_elrsr(struct kvm_vcpu *vcpu, void __iomem *base)
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static void __hyp_text save_lrs(struct kvm_vcpu *vcpu, void __iomem *base)
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static void __hyp_text save_lrs(struct kvm_vcpu *vcpu, void __iomem *base)
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{
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{
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struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
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struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
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- int nr_lr = (kern_hyp_va(&kvm_vgic_global_state))->nr_lr;
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int i;
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int i;
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+ u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs;
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- for (i = 0; i < nr_lr; i++) {
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- if (!(vcpu->arch.vgic_cpu.live_lrs & (1UL << i)))
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- continue;
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-
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+ for (i = 0; i < used_lrs; i++) {
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if (cpu_if->vgic_elrsr & (1UL << i))
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if (cpu_if->vgic_elrsr & (1UL << i))
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cpu_if->vgic_lr[i] &= ~GICH_LR_STATE;
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cpu_if->vgic_lr[i] &= ~GICH_LR_STATE;
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else
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else
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@@ -110,11 +103,12 @@ void __hyp_text __vgic_v2_save_state(struct kvm_vcpu *vcpu)
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struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
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struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
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struct vgic_dist *vgic = &kvm->arch.vgic;
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struct vgic_dist *vgic = &kvm->arch.vgic;
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void __iomem *base = kern_hyp_va(vgic->vctrl_base);
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void __iomem *base = kern_hyp_va(vgic->vctrl_base);
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+ u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs;
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if (!base)
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if (!base)
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return;
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return;
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- if (vcpu->arch.vgic_cpu.live_lrs) {
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+ if (used_lrs) {
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cpu_if->vgic_apr = readl_relaxed(base + GICH_APR);
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cpu_if->vgic_apr = readl_relaxed(base + GICH_APR);
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save_maint_int_state(vcpu, base);
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save_maint_int_state(vcpu, base);
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@@ -122,8 +116,6 @@ void __hyp_text __vgic_v2_save_state(struct kvm_vcpu *vcpu)
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save_lrs(vcpu, base);
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save_lrs(vcpu, base);
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writel_relaxed(0, base + GICH_HCR);
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writel_relaxed(0, base + GICH_HCR);
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-
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- vcpu->arch.vgic_cpu.live_lrs = 0;
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} else {
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} else {
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cpu_if->vgic_eisr = 0;
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cpu_if->vgic_eisr = 0;
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cpu_if->vgic_elrsr = ~0UL;
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cpu_if->vgic_elrsr = ~0UL;
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@@ -139,31 +131,20 @@ void __hyp_text __vgic_v2_restore_state(struct kvm_vcpu *vcpu)
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struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
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struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
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struct vgic_dist *vgic = &kvm->arch.vgic;
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struct vgic_dist *vgic = &kvm->arch.vgic;
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void __iomem *base = kern_hyp_va(vgic->vctrl_base);
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void __iomem *base = kern_hyp_va(vgic->vctrl_base);
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- int nr_lr = (kern_hyp_va(&kvm_vgic_global_state))->nr_lr;
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int i;
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int i;
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- u64 live_lrs = 0;
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+ u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs;
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if (!base)
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if (!base)
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return;
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return;
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-
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- for (i = 0; i < nr_lr; i++)
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- if (cpu_if->vgic_lr[i] & GICH_LR_STATE)
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- live_lrs |= 1UL << i;
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-
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- if (live_lrs) {
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+ if (used_lrs) {
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writel_relaxed(cpu_if->vgic_hcr, base + GICH_HCR);
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writel_relaxed(cpu_if->vgic_hcr, base + GICH_HCR);
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writel_relaxed(cpu_if->vgic_apr, base + GICH_APR);
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writel_relaxed(cpu_if->vgic_apr, base + GICH_APR);
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- for (i = 0; i < nr_lr; i++) {
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- if (!(live_lrs & (1UL << i)))
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- continue;
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-
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+ for (i = 0; i < used_lrs; i++) {
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writel_relaxed(cpu_if->vgic_lr[i],
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writel_relaxed(cpu_if->vgic_lr[i],
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base + GICH_LR0 + (i * 4));
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base + GICH_LR0 + (i * 4));
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}
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}
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}
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}
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-
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- vcpu->arch.vgic_cpu.live_lrs = live_lrs;
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}
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}
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#ifdef CONFIG_ARM64
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#ifdef CONFIG_ARM64
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