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@@ -30,30 +30,30 @@
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/* Operation Mode Strap Override */
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#define MII_KSZPHY_OMSO 0x16
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-#define KSZPHY_OMSO_B_CAST_OFF (1 << 9)
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-#define KSZPHY_OMSO_RMII_OVERRIDE (1 << 1)
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-#define KSZPHY_OMSO_MII_OVERRIDE (1 << 0)
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+#define KSZPHY_OMSO_B_CAST_OFF BIT(9)
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+#define KSZPHY_OMSO_RMII_OVERRIDE BIT(1)
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+#define KSZPHY_OMSO_MII_OVERRIDE BIT(0)
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/* general Interrupt control/status reg in vendor specific block. */
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#define MII_KSZPHY_INTCS 0x1B
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-#define KSZPHY_INTCS_JABBER (1 << 15)
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-#define KSZPHY_INTCS_RECEIVE_ERR (1 << 14)
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-#define KSZPHY_INTCS_PAGE_RECEIVE (1 << 13)
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-#define KSZPHY_INTCS_PARELLEL (1 << 12)
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-#define KSZPHY_INTCS_LINK_PARTNER_ACK (1 << 11)
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-#define KSZPHY_INTCS_LINK_DOWN (1 << 10)
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-#define KSZPHY_INTCS_REMOTE_FAULT (1 << 9)
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-#define KSZPHY_INTCS_LINK_UP (1 << 8)
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+#define KSZPHY_INTCS_JABBER BIT(15)
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+#define KSZPHY_INTCS_RECEIVE_ERR BIT(14)
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+#define KSZPHY_INTCS_PAGE_RECEIVE BIT(13)
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+#define KSZPHY_INTCS_PARELLEL BIT(12)
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+#define KSZPHY_INTCS_LINK_PARTNER_ACK BIT(11)
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+#define KSZPHY_INTCS_LINK_DOWN BIT(10)
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+#define KSZPHY_INTCS_REMOTE_FAULT BIT(9)
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+#define KSZPHY_INTCS_LINK_UP BIT(8)
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#define KSZPHY_INTCS_ALL (KSZPHY_INTCS_LINK_UP |\
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KSZPHY_INTCS_LINK_DOWN)
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/* general PHY control reg in vendor specific block. */
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#define MII_KSZPHY_CTRL 0x1F
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/* bitmap of PHY register to set interrupt mode */
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-#define KSZPHY_CTRL_INT_ACTIVE_HIGH (1 << 9)
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-#define KSZ9021_CTRL_INT_ACTIVE_HIGH (1 << 14)
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-#define KS8737_CTRL_INT_ACTIVE_HIGH (1 << 14)
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-#define KSZ8051_RMII_50MHZ_CLK (1 << 7)
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+#define KSZPHY_CTRL_INT_ACTIVE_HIGH BIT(9)
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+#define KSZ9021_CTRL_INT_ACTIVE_HIGH BIT(14)
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+#define KS8737_CTRL_INT_ACTIVE_HIGH BIT(14)
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+#define KSZ8051_RMII_50MHZ_CLK BIT(7)
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/* Write/read to/from extended registers */
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#define MII_KSZPHY_EXTREG 0x0b
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@@ -400,8 +400,8 @@ static int ksz9031_config_init(struct phy_device *phydev)
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}
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#define KSZ8873MLL_GLOBAL_CONTROL_4 0x06
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-#define KSZ8873MLL_GLOBAL_CONTROL_4_DUPLEX (1 << 6)
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-#define KSZ8873MLL_GLOBAL_CONTROL_4_SPEED (1 << 4)
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+#define KSZ8873MLL_GLOBAL_CONTROL_4_DUPLEX BIT(6)
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+#define KSZ8873MLL_GLOBAL_CONTROL_4_SPEED BIT(4)
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static int ksz8873mll_read_status(struct phy_device *phydev)
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{
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int regval;
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