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@@ -551,7 +551,7 @@ void mv88e6xxx_adjust_link(struct dsa_switch *ds, int port,
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reg |= PORT_PCS_CTRL_DUPLEX_FULL;
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if ((mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds)) &&
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- (port >= ps->num_ports - 2)) {
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+ (port >= ps->info->num_ports - 2)) {
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if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
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reg |= PORT_PCS_CTRL_RGMII_DELAY_RXCLK;
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if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
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@@ -1132,7 +1132,7 @@ static int _mv88e6xxx_port_based_vlan_map(struct dsa_switch *ds, int port)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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struct net_device *bridge = ps->ports[port].bridge_dev;
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- const u16 mask = (1 << ps->num_ports) - 1;
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+ const u16 mask = (1 << ps->info->num_ports) - 1;
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u16 output_ports = 0;
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int reg;
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int i;
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@@ -1141,7 +1141,7 @@ static int _mv88e6xxx_port_based_vlan_map(struct dsa_switch *ds, int port)
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if (dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port)) {
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output_ports = mask;
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} else {
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- for (i = 0; i < ps->num_ports; ++i) {
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+ for (i = 0; i < ps->info->num_ports; ++i) {
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/* allow sending frames to every group member */
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if (bridge && ps->ports[i].bridge_dev == bridge)
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output_ports |= BIT(i);
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@@ -1282,7 +1282,7 @@ static int _mv88e6xxx_vtu_stu_data_read(struct dsa_switch *ds,
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regs[i] = ret;
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}
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- for (i = 0; i < ps->num_ports; ++i) {
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+ for (i = 0; i < ps->info->num_ports; ++i) {
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unsigned int shift = (i % 4) * 4 + nibble_offset;
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u16 reg = regs[i / 4];
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@@ -1301,7 +1301,7 @@ static int _mv88e6xxx_vtu_stu_data_write(struct dsa_switch *ds,
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int i;
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int ret;
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- for (i = 0; i < ps->num_ports; ++i) {
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+ for (i = 0; i < ps->info->num_ports; ++i) {
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unsigned int shift = (i % 4) * 4 + nibble_offset;
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u8 data = entry->data[i];
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@@ -1633,7 +1633,7 @@ static int _mv88e6xxx_fid_new(struct dsa_switch *ds, u16 *fid)
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bitmap_zero(fid_bitmap, MV88E6XXX_N_FID);
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/* Set every FID bit used by the (un)bridged ports */
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- for (i = 0; i < ps->num_ports; ++i) {
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+ for (i = 0; i < ps->info->num_ports; ++i) {
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err = _mv88e6xxx_port_fid_get(ds, i, fid);
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if (err)
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return err;
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@@ -1683,7 +1683,7 @@ static int _mv88e6xxx_vtu_new(struct dsa_switch *ds, u16 vid,
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return err;
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/* exclude all ports except the CPU and DSA ports */
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- for (i = 0; i < ps->num_ports; ++i)
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+ for (i = 0; i < ps->info->num_ports; ++i)
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vlan.data[i] = dsa_is_cpu_port(ds, i) || dsa_is_dsa_port(ds, i)
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? GLOBAL_VTU_DATA_MEMBER_TAG_UNMODIFIED
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: GLOBAL_VTU_DATA_MEMBER_TAG_NON_MEMBER;
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@@ -1772,7 +1772,7 @@ static int mv88e6xxx_port_check_hw_vlan(struct dsa_switch *ds, int port,
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if (vlan.vid > vid_end)
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break;
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- for (i = 0; i < ps->num_ports; ++i) {
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+ for (i = 0; i < ps->info->num_ports; ++i) {
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if (dsa_is_dsa_port(ds, i) || dsa_is_cpu_port(ds, i))
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continue;
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@@ -1921,7 +1921,7 @@ static int _mv88e6xxx_port_vlan_del(struct dsa_switch *ds, int port, u16 vid)
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/* keep the VLAN unless all ports are excluded */
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vlan.valid = false;
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- for (i = 0; i < ps->num_ports; ++i) {
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+ for (i = 0; i < ps->info->num_ports; ++i) {
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if (dsa_is_cpu_port(ds, i) || dsa_is_dsa_port(ds, i))
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continue;
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@@ -2230,11 +2230,11 @@ int mv88e6xxx_port_bridge_join(struct dsa_switch *ds, int port,
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mutex_lock(&ps->smi_mutex);
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/* Get or create the bridge FID and assign it to the port */
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- for (i = 0; i < ps->num_ports; ++i)
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+ for (i = 0; i < ps->info->num_ports; ++i)
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if (ps->ports[i].bridge_dev == bridge)
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break;
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- if (i < ps->num_ports)
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+ if (i < ps->info->num_ports)
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err = _mv88e6xxx_port_fid_get(ds, i, &fid);
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else
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err = _mv88e6xxx_fid_new(ds, &fid);
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@@ -2248,7 +2248,7 @@ int mv88e6xxx_port_bridge_join(struct dsa_switch *ds, int port,
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/* Assign the bridge and remap each port's VLANTable */
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ps->ports[port].bridge_dev = bridge;
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- for (i = 0; i < ps->num_ports; ++i) {
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+ for (i = 0; i < ps->info->num_ports; ++i) {
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if (ps->ports[i].bridge_dev == bridge) {
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err = _mv88e6xxx_port_based_vlan_map(ds, i);
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if (err)
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@@ -2279,7 +2279,7 @@ void mv88e6xxx_port_bridge_leave(struct dsa_switch *ds, int port)
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/* Unassign the bridge and remap each port's VLANTable */
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ps->ports[port].bridge_dev = NULL;
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- for (i = 0; i < ps->num_ports; ++i)
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+ for (i = 0; i < ps->info->num_ports; ++i)
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if (i == port || ps->ports[i].bridge_dev == bridge)
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if (_mv88e6xxx_port_based_vlan_map(ds, i))
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netdev_warn(ds->ports[i], "failed to remap\n");
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@@ -2298,7 +2298,7 @@ static void mv88e6xxx_bridge_work(struct work_struct *work)
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mutex_lock(&ps->smi_mutex);
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- for (port = 0; port < ps->num_ports; ++port)
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+ for (port = 0; port < ps->info->num_ports; ++port)
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if (test_and_clear_bit(port, ps->port_state_update_mask) &&
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_mv88e6xxx_port_state(ds, port, ps->ports[port].state))
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netdev_warn(ds->ports[port], "failed to update state to %s\n",
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@@ -2630,7 +2630,7 @@ int mv88e6xxx_setup_ports(struct dsa_switch *ds)
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int ret;
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int i;
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- for (i = 0; i < ps->num_ports; i++) {
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+ for (i = 0; i < ps->info->num_ports; i++) {
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ret = mv88e6xxx_setup_port(ds, i);
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if (ret < 0)
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return ret;
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@@ -2737,7 +2737,7 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds)
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err = _mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_TRUNK_MASK,
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0x8000 |
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(i << GLOBAL2_TRUNK_MASK_NUM_SHIFT) |
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- ((1 << ps->num_ports) - 1));
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+ ((1 << ps->info->num_ports) - 1));
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if (err)
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goto unlock;
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}
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@@ -2790,7 +2790,7 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds)
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* ingress rate limit registers to their initial
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* state.
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*/
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- for (i = 0; i < ps->num_ports; i++) {
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+ for (i = 0; i < ps->info->num_ports; i++) {
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err = _mv88e6xxx_reg_write(ds, REG_GLOBAL2,
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GLOBAL2_INGRESS_OP,
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0x9000 | (i << 8));
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@@ -2835,7 +2835,7 @@ int mv88e6xxx_switch_reset(struct dsa_switch *ds, bool ppu_active)
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mutex_lock(&ps->smi_mutex);
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/* Set all ports to the disabled state. */
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- for (i = 0; i < ps->num_ports; i++) {
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+ for (i = 0; i < ps->info->num_ports; i++) {
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ret = _mv88e6xxx_reg_read(ds, REG_PORT(i), PORT_CONTROL);
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if (ret < 0)
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goto unlock;
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@@ -2918,7 +2918,7 @@ static int mv88e6xxx_port_to_phy_addr(struct dsa_switch *ds, int port)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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- if (port >= 0 && port < ps->num_ports)
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+ if (port >= 0 && port < ps->info->num_ports)
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return port;
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return -EINVAL;
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}
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