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@@ -32,10 +32,10 @@
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#define CHT_WC_CHGRCTRL0_EMRGCHREN BIT(1)
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#define CHT_WC_CHGRCTRL0_EXTCHRDIS BIT(2)
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#define CHT_WC_CHGRCTRL0_SWCONTROL BIT(3)
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-#define CHT_WC_CHGRCTRL0_TTLCK_MASK BIT(4)
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-#define CHT_WC_CHGRCTRL0_CCSM_OFF_MASK BIT(5)
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-#define CHT_WC_CHGRCTRL0_DBPOFF_MASK BIT(6)
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-#define CHT_WC_CHGRCTRL0_WDT_NOKICK BIT(7)
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+#define CHT_WC_CHGRCTRL0_TTLCK BIT(4)
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+#define CHT_WC_CHGRCTRL0_CCSM_OFF BIT(5)
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+#define CHT_WC_CHGRCTRL0_DBPOFF BIT(6)
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+#define CHT_WC_CHGRCTRL0_CHR_WDT_NOKICK BIT(7)
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#define CHT_WC_CHGRCTRL1 0x5e17
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@@ -52,7 +52,7 @@
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#define CHT_WC_USBSRC_TYPE_ACA 4
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#define CHT_WC_USBSRC_TYPE_SE1 5
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#define CHT_WC_USBSRC_TYPE_MHL 6
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-#define CHT_WC_USBSRC_TYPE_FLOAT_DP_DN 7
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+#define CHT_WC_USBSRC_TYPE_FLOATING 7
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#define CHT_WC_USBSRC_TYPE_OTHER 8
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#define CHT_WC_USBSRC_TYPE_DCP_EXTPHY 9
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@@ -61,7 +61,7 @@
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#define CHT_WC_PWRSRC_STS 0x6e1e
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#define CHT_WC_PWRSRC_VBUS BIT(0)
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#define CHT_WC_PWRSRC_DC BIT(1)
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-#define CHT_WC_PWRSRC_BAT BIT(2)
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+#define CHT_WC_PWRSRC_BATT BIT(2)
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#define CHT_WC_PWRSRC_ID_GND BIT(3)
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#define CHT_WC_PWRSRC_ID_FLOAT BIT(4)
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@@ -158,7 +158,7 @@ static int cht_wc_extcon_get_charger(struct cht_wc_extcon_data *ext,
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ret);
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return EXTCON_CHG_USB_SDP;
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case CHT_WC_USBSRC_TYPE_SDP:
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- case CHT_WC_USBSRC_TYPE_FLOAT_DP_DN:
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+ case CHT_WC_USBSRC_TYPE_FLOATING:
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case CHT_WC_USBSRC_TYPE_OTHER:
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return EXTCON_CHG_USB_SDP;
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case CHT_WC_USBSRC_TYPE_CDP:
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@@ -279,7 +279,7 @@ static int cht_wc_extcon_sw_control(struct cht_wc_extcon_data *ext, bool enable)
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{
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int ret, mask, val;
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- mask = CHT_WC_CHGRCTRL0_SWCONTROL | CHT_WC_CHGRCTRL0_CCSM_OFF_MASK;
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+ mask = CHT_WC_CHGRCTRL0_SWCONTROL | CHT_WC_CHGRCTRL0_CCSM_OFF;
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val = enable ? mask : 0;
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ret = regmap_update_bits(ext->regmap, CHT_WC_CHGRCTRL0, mask, val);
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if (ret)
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